The semiconductor industry is continuously moving toward the fabrication of smaller and more complex integrated circuits with higher performance. Most of the reductions in size of electronic components have come from reductions in feature size, so more components can be utilized in a given area to provide a higher density. The smaller feature size has generally reduced integrated circuit size in a two dimensional manner, because more components can be incorporated onto the surface of an integrated circuit chip of a given size. This increase in component density has decreased the area of the integrated circuit and has surpassed the ability to bond some integrated circuit chips directly to a substrate.
Interposers are utilized to redistribute contact points from an integrated circuit chip to a larger area on the interposer. Interposers also allow for three dimensional packaging of multiple integrated circuit chips. The interposers generally include solder points, electrically conductive through vias, and insulating components that redistribute the contact areas from the integrated circuit chip to the larger interposer. However, the aforementioned features of the interposers can introduce large coefficient of thermal expansion (CTE) mismatches that induce stress, and the induced stress can produce defects. Quality assurance electrical interrogations are typically performed at a test circuit of the interposer after the packaged interposer and integrated circuit chip(s) are finished. Sample interposers are typically electrically interrogated for quality assurance on a periodic basis, such as monthly, biweekly, or weekly. If a fault is found during quality assurance testing, any interposers produced between a passing quality assurance test and a failed quality assurance test may likewise be defective. Furthermore, the quality assurance electrical test circuit is typically outside of a prime portion of the interposer where electrical connections are formed between an integrated circuit chip and other components of the integrated circuit. Quality assurance testing in frame areas that do not form electrical connections for the integrated circuit may not provide results that accurately monitor the product quality.
Accordingly, it is desirable to provide methods of producing integrated circuits with interposers having quality assurance test circuits that can be electrically interrogated during the manufacturing process, and integrated circuits produced from such methods. In addition, it is desirable to provide methods of producing integrated circuits with interposers that enable quality control electrical interrogation within the prime area of the interposer, and integrated circuits produced from such methods. Furthermore, other desirable features and characteristics of the present embodiment will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.